The invention relates generally to automatic test equipment, and more particularly to a wafer-level contactor used during the process of testing semiconductor devices during high-performance test or burn-in test procedures.
Testing is an important process in the manufacture of semiconductor devices. At both the wafer and packaged-device levels, testing confirms whether individual devices are good or bad before the devices are employed in an electronic assembly.
Generally, a conventional manufacturing test flow for semiconductor devices begins with a probe test at the wafer-level under expected device operating conditions. Data from the test is used for a repair process, if the device is a memory device with redundant rows and columns. Following repair, the devices are diced from the wafer and packaged in a device housing. A burn-in test is then employed, where the devices are exposed to varying temperatures and operating conditions. Lastly, following burn-in, a high-performance test is undertaken on the packaged parts.
While this conventional test flow has served the industry well, those skilled in the art have recognized that if the burn-in process could be employed at the wafer level, then unnecessary packaging and testing steps could be avoided for devices that would fail burn-in. This could amount to substantial savings.
As a result, a proposal referred to as xe2x80x9cknown good diexe2x80x9d has surfaced, where most if not all of the testing for semiconductor devices is done at the wafer level. This involves first subjecting the wafer to a high performance probe test, followed by a burn-in procedure. The results from the tests are then used to repair the devices at the wafer level. Passing devices and repaired devices are then packaged, as appropriate.
As noted above, a significant difference in the two test flow methodologies lies in having the burn-in process at the wafer level. Unfortunately, this is no easy task. Conventional wafer-level high-performance and burn-in techniques typically employ costly contactors that provide compliant contacts that are spaced at the same pitch as the wafer contacts. This pitch spacing can be on the order of approximately one-hundred micrometers. Additionally, because high performance and burn-in testing involves substantially elevating the temperature of the wafer, misalignments due to material expansion effects may result if the contactor has a different thermal coefficient of expansion than that of the semiconductor wafer.
One proposal that addresses this problem, in U.S. Pat. No. 5,977,787, to Das et al., utilizes a probe assembly that includes two parallel plates spaced apart by a support means. Disposed between the plates are thousands of permanently installed buckling beam probe contacts to engage correspondingly spaced contacts formed on a semiconductor wafer. The plates are formed of a material having a TCE that is close to the TCE of silicon. While this proposal appears beneficial for its intended applications, the cost to build a contactor with such tight pitch requirements between the contacts could be undersirably high.
Most recently, device manufacturers have noted the need to substantially change the packaging requirements for semiconductor devices. In some schemes, the devices are ready for implementation on a multi-chip module or printed-circuit-board without the conventional ceramic or plastic packaging. As shown in FIG. 1, this is made possible through a process known as xe2x80x9cwafer-level packagingxe2x80x9d (WLP).
Further referring to FIG. 1, WLP generally consists of a few additional process steps on a conventional wafer to space the available contacts further apart. The processing involves depositing a dielectric layer 10 and a copper redistribution layer 12 above the conventional device contact layer 14 to distribute the contact xe2x80x9ctargetsxe2x80x9d to a more useable pitch approaching that of conventional BGA spacings and the like. As a result, the contact xe2x80x9ctargetxe2x80x9d of the die/package changes from one-hundred microns to around three-hundred-fifty microns, and the pitch of these targets moves from less than one-hundred microns to around seven-hundred-fifty microns.
What is needed and currently unavailable is a contactor solution that takes advantage of wafer-level packaging to provide reliable low-cost contact to devices-under-test at the wafer level for both high-performance and burn-in testing. The wafer-level contactor of the present invention satisfies this need.
The wafer-level contactor of the present invention provides an economical approach to wafer-level contacting by employing proven components and low-cost manufacturing processes. As a result, per contact costs are minimized over the life of the contactor, resulting in substantial savings for device manufacturers, when compared with conventional wafer-level contacting schemes.
To realize the foregoing advantages, the invention in one form comprises a contact housing adapted for carrying a plurality of compliant contacts. The contact housing is for use in contacting a semiconductor wafer-level package having an array of contacts disposed in a predetermined pattern. The contact housing includes a first guide plate formed from a material having a temperature coefficient of expansion approximating that of the semiconductor wafer-level package. The guide plate has a first pattern of apertures formed by a microelectromechanical process such that the pattern of apertures matches the predetermined pattern of contacts on the wafer-level package. A second guide plate is formed similar to the first guide plate, and includes a second pattern of apertures disposed in vertical registration with the first pattern of apertures. A spacer is interposed between the first and second guide plates. The first and second guide plates cooperate with the spacer to form respective receptacles adapted for carrying the plurality of compliant contacts.
Other features and advantages of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.